Power Processing
The Power Module > Power Processing Edit Board is broken out into the following segments. Each of these segments relates to defining the power processor Component for the spacecraft. To import a COTS power processor instead, click "Import from COTS Library" at the top.
For more details on the specifics of each of these segments, please view the adaptive guidance in the Module's design capture interfaces.
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Power ControllerThis segment is used to populate the generic Component information for the power processor in addition to the topology-specific attributes. Sedaro Satellite currently supports the following topologies.
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Single Converter MPPT![Single Converter MPPT Topology](/assets/images/single_conv_mppt_topology_full-078b3ff794b975270d32b1301db457df.png)
Single Converter MPPT Topology
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Two-Converter Maximum Peak Power Point Tracking![Two-Converter Maximum Peak Power Point Tracking Topology](/assets/images/two_conv_mppt_topology_full-cd5e588482426804b330ccdcec887a2d.png)
Two-Converter Maximum Peak Power Point Tracking Topology
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Quasi-Regulated Direct Energy Transfer![Quasi-Regulated Direct Energy Transfer Topology](/assets/images/quasi_reg_det_topology_full-50533190a0e2ac240a3abda5af5466e1.png)
Quasi-Regulated Direct Energy Transfer Topology
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Fully-Regulated Direct Energy Transfer![Fully-Regulated Direct Energy Transfer Topology](/assets/images/fully_reg_det_topology_full-605141bc3d36a71837b043b702d6c262.png)
Fully-Regulated Direct Energy Transfer Topology
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Single-Converter Hybrid![Single-Converter Hybrid Topology](/assets/images/single_conv_hybrid_topology_full-ea919b6dfad0b77d4df6aacbd6dfbd66.png)
Single-Converter Hybrid Topology
If your topology is not supported, contact us with the details and we will do our best to add it. In the future, you will be able to define your own topology models via Python code.
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Bus RegulatorsBus Regulators regulate their output to a fixed voltage for the Components and bus regulators that they provide power to. Bus regulators can be defined to be fed by either the power controller's core bus or another bus regulator's output (if cascaded).